2005-06-10 18:44:18 +02:00
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/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* @file
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2005-06-30 22:18:07 +02:00
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* Modifications for the FreeBSD kernel.
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* Based on kern/linux/linux_system.cc.
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2005-06-10 18:44:18 +02:00
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*
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*/
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#include "base/loader/symtab.hh"
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#include "cpu/exec_context.hh"
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#include "kern/freebsd/freebsd_system.hh"
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#include "mem/functional/memory_control.hh"
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#include "mem/functional/physical.hh"
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#include "sim/builder.hh"
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2006-02-08 07:03:55 +01:00
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#include "arch/isa_traits.hh"
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2006-02-03 06:16:44 +01:00
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#include "sim/byteswap.hh"
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2005-06-10 18:44:18 +02:00
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#include "targetarch/vtophys.hh"
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2005-08-16 22:08:42 +02:00
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#define TIMER_FREQUENCY 1193180
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2005-06-10 18:44:18 +02:00
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using namespace std;
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Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.
arch/alpha/alpha_linux_process.cc:
Added using directive for AlphaISA namespace
arch/alpha/alpha_memory.hh:
arch/alpha/isa/branch.isa:
cpu/pc_event.hh:
Added typedefs for Addr
arch/alpha/alpha_tru64_process.cc:
arch/alpha/arguments.cc:
Added using directive for AlphaISA
arch/alpha/ev5.hh:
Added an include of arch/alpha/isa_traits.hh, and a using directive for the AlphaISA namespace.
arch/alpha/faults.hh:
Added a typedef for the Addr type, and changed the formatting of the faults slightly.
arch/alpha/isa/main.isa:
Untemplatized StaticInst, added a using for namespace AlphaISA to show up in decoder.cc and the exec.ccs, relocated makeNop to decoder.hh
arch/alpha/isa/mem.isa:
Untemplatized StaticInst and StaticInstPtr
arch/alpha/isa/pal.isa:
cpu/base_dyn_inst.cc:
Untemplatized StaticInstPtr
arch/alpha/isa_traits.hh:
Changed variables to be externs instead of static since they are part of a namespace and not a class.
arch/alpha/stacktrace.cc:
Untemplatized StaticInstPtr, and added a using directive for AlphaISA.
arch/alpha/stacktrace.hh:
Added some typedefs for Addr and MachInst, and untemplatized StaticInstPtr
arch/alpha/vtophys.cc:
Added a using directive for AlphaISA
arch/alpha/vtophys.hh:
Added the AlphaISA namespace specifier where needed
arch/isa_parser.py:
Changed the placement of the definition of the decodeInst function to be outside the namespaceInst namespace.
base/loader/object_file.hh:
cpu/o3/bpred_unit.hh:
Added a typedef for Addr
base/loader/symtab.hh:
Added a typedef for Addr, and added a TheISA to Addr in another typedef
base/remote_gdb.cc:
Added a using namespace TheISA, and untemplatized StaticInstPtr
base/remote_gdb.hh:
Added typedefs for Addr and MachInst
cpu/base.cc:
Added TheISA specifier to some variables exported from the isa.
cpu/base.hh:
Added a typedef for Addr, and TheISA to some variables from the ISA
cpu/base_dyn_inst.hh:
Untemplatized StaticInstPtr, and added TheISA specifier to some variables from the ISA.
cpu/exec_context.hh:
Added some typedefs for types from the isa, and added TheISA specifier to some variables from the isa
cpu/exetrace.hh:
Added typedefs for some types from the ISA, and untemplatized StaticInstPtr
cpu/memtest/memtest.cc:
cpu/o3/btb.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ide_disk.cc:
dev/isa_fake.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/platform.cc:
dev/sinic.cc:
dev/uart8250.cc:
kern/freebsd/freebsd_system.cc:
kern/linux/linux_system.cc:
kern/system_events.cc:
kern/tru64/dump_mbuf.cc:
kern/tru64/tru64_events.cc:
sim/process.cc:
sim/pseudo_inst.cc:
sim/system.cc:
Added using namespace TheISA
cpu/memtest/memtest.hh:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/itx_reader.hh:
dev/ide_disk.hh:
dev/pcidev.hh:
dev/platform.hh:
dev/tsunami.hh:
sim/system.hh:
sim/vptr.hh:
Added typedef for Addr
cpu/o3/2bit_local_pred.hh:
Changed the include to use arch/isa_traits.hh instead of arch/alpha/isa_traits.hh. Added typedef for Addr
cpu/o3/alpha_cpu.hh:
Added typedefs for Addr and IntReg
cpu/o3/alpha_cpu_impl.hh:
Added this-> to setNextPC to fix a problem since it didn't depend on template parameters any more. Removed "typename" where it was no longer needed.
cpu/o3/alpha_dyn_inst.hh:
Cleaned up some typedefs, and untemplatized StaticInst
cpu/o3/alpha_dyn_inst_impl.hh:
untemplatized StaticInstPtr
cpu/o3/alpha_impl.hh:
Fixed up a typedef of MachInst
cpu/o3/bpred_unit_impl.hh:
Added a using TheISA::MachInst to a function
cpu/o3/btb.hh:
Changed an include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr
cpu/o3/commit.hh:
Removed a typedef of Impl::ISA as ISA, since TheISA takes care of this now.
cpu/o3/cpu.cc:
Cleaned up namespace issues
cpu/o3/cpu.hh:
Cleaned up namespace usage
cpu/o3/decode.hh:
Removed typedef of ISA, and changed it to TheISA
cpu/o3/fetch.hh:
Fized up typedefs, and changed ISA to TheISA
cpu/o3/free_list.hh:
Changed include of arch/alpha/isa_traits.hh to arch/isa_traits.hh
cpu/o3/iew.hh:
Removed typedef of ISA
cpu/o3/iew_impl.hh:
Added TheISA namespace specifier to MachInst
cpu/o3/ras.hh:
Changed include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr.
cpu/o3/regfile.hh:
Changed ISA to TheISA, and added some typedefs for Addr, IntReg, FloatReg, and MiscRegFile
cpu/o3/rename.hh:
Changed ISA to TheISA, and added a typedef for RegIndex
cpu/o3/rename_map.hh:
Added an include for arch/isa_traits.hh, and a typedef for RegIndex
cpu/o3/rob.hh:
Added a typedef for RegIndex
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.hh:
Changed an include of arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef of Addr
cpu/ozone/cpu.hh:
Changed ISA into TheISA, and untemplatized StaticInst
cpu/pc_event.cc:
Added namespace specifier TheISA to Addr types
cpu/profile.hh:
kern/kernel_stats.hh:
Added typedef for Addr, and untemplatized StaticInstPtr
cpu/simple/cpu.cc:
Changed using directive from LittleEndianGuest to AlphaISA, which will contain both namespaces. Added TheISA where needed, and untemplatized StaticInst
cpu/simple/cpu.hh:
Added a typedef for MachInst, and untemplatized StaticInst
cpu/static_inst.cc:
Untemplatized StaticInst
cpu/static_inst.hh:
Untemplatized StaticInst by using the TheISA namespace
dev/alpha_console.cc:
Added using namespace AlphaISA
dev/simple_disk.hh:
Added typedef for Addr and fixed up some formatting
dev/sinicreg.hh:
Added TheISA namespace specifier where needed
dev/tsunami.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Added using namespace TheISA. It might be better for it to be AlphaISA
dev/tsunami_cchip.cc:
Added typedef for TheISA. It might be better for it to be AlphaISA
kern/linux/aligned.hh:
sim/pseudo_inst.hh:
Added TheISA namespace specifier to Addr
kern/linux/linux_threadinfo.hh:
Added typedef for Addr, and TheISA namespace specifier to StackPointerReg
kern/tru64/mbuf.hh:
Added TheISA to Addr type in structs
sim/process.hh:
Added typedefs of Addr, RegFile, and MachInst
sim/syscall_emul.cc:
Added using namespace TheISA, and a cast of VMPageSize to the int type
sim/syscall_emul.hh:
Added typecast for Addr, and TheISA namespace specifier for where needed
--HG--
extra : convert_revision : 91d4f6ca33a73b21c1f1771d74bfdea3b80eff45
2006-02-19 08:34:37 +01:00
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using namespace TheISA;
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2005-06-10 18:44:18 +02:00
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FreebsdSystem::FreebsdSystem(Params *p)
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: System(p)
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{
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/**
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2005-06-23 22:27:06 +02:00
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* Any time DELAY is called just skip the function.
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2005-09-24 20:20:29 +02:00
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* Shouldn't we actually emulate the delay?
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2005-06-10 18:44:18 +02:00
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*/
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2005-09-24 20:20:29 +02:00
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skipDelayEvent = addKernelFuncEvent<SkipFuncEvent>("DELAY");
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skipCalibrateClocks =
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addKernelFuncEvent<SkipCalibrateClocksEvent>("calibrate_clocks");
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2005-06-10 18:44:18 +02:00
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}
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2005-06-18 00:08:05 +02:00
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2005-06-10 18:44:18 +02:00
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FreebsdSystem::~FreebsdSystem()
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{
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delete skipDelayEvent;
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2005-06-18 00:08:05 +02:00
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delete skipCalibrateClocks;
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}
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void
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FreebsdSystem::doCalibrateClocks(ExecContext *xc)
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{
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Addr ppc_vaddr = 0;
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Addr timer_vaddr = 0;
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Addr ppc_paddr = 0;
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Addr timer_paddr = 0;
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ppc_vaddr = (Addr)xc->regs.intRegFile[ArgumentReg1];
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timer_vaddr = (Addr)xc->regs.intRegFile[ArgumentReg2];
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ppc_paddr = vtophys(physmem, ppc_vaddr);
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timer_paddr = vtophys(physmem, timer_vaddr);
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uint8_t *ppc = physmem->dma_addr(ppc_paddr, sizeof(uint32_t));
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uint8_t *timer = physmem->dma_addr(timer_paddr, sizeof(uint32_t));
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2006-02-08 07:03:55 +01:00
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*(uint32_t *)ppc = htog((uint32_t)Clock::Frequency);
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*(uint32_t *)timer = htog((uint32_t)TIMER_FREQUENCY);
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2005-06-10 18:44:18 +02:00
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}
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2005-09-24 20:20:29 +02:00
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void
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FreebsdSystem::SkipCalibrateClocksEvent::process(ExecContext *xc)
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{
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SkipFuncEvent::process(xc);
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((FreebsdSystem *)xc->system)->doCalibrateClocks(xc);
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}
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2005-06-10 18:44:18 +02:00
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BEGIN_DECLARE_SIM_OBJECT_PARAMS(FreebsdSystem)
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Param<Tick> boot_cpu_frequency;
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SimObjectParam<MemoryController *> memctrl;
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SimObjectParam<PhysicalMemory *> physmem;
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Param<string> kernel;
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Param<string> console;
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Param<string> pal;
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Param<string> boot_osflags;
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Param<string> readfile;
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Param<unsigned int> init_param;
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Param<uint64_t> system_type;
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Param<uint64_t> system_rev;
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Param<bool> bin;
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VectorParam<string> binned_fns;
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Param<bool> bin_int;
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END_DECLARE_SIM_OBJECT_PARAMS(FreebsdSystem)
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BEGIN_INIT_SIM_OBJECT_PARAMS(FreebsdSystem)
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INIT_PARAM(boot_cpu_frequency, "Frequency of the boot CPU"),
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INIT_PARAM(memctrl, "memory controller"),
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INIT_PARAM(physmem, "phsyical memory"),
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INIT_PARAM(kernel, "file that contains the kernel code"),
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INIT_PARAM(console, "file that contains the console code"),
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INIT_PARAM(pal, "file that contains palcode"),
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INIT_PARAM_DFLT(boot_osflags, "flags to pass to the kernel during boot",
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"a"),
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INIT_PARAM_DFLT(readfile, "file to read startup script from", ""),
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INIT_PARAM_DFLT(init_param, "numerical value to pass into simulator", 0),
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INIT_PARAM_DFLT(system_type, "Type of system we are emulating", 34),
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INIT_PARAM_DFLT(system_rev, "Revision of system we are emulating", 1<<10),
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INIT_PARAM_DFLT(bin, "is this system to be binned", false),
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INIT_PARAM(binned_fns, "functions to be broken down and binned"),
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INIT_PARAM_DFLT(bin_int, "is interrupt code binned seperately?", true)
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END_INIT_SIM_OBJECT_PARAMS(FreebsdSystem)
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CREATE_SIM_OBJECT(FreebsdSystem)
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{
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System::Params *p = new System::Params;
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p->name = getInstanceName();
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p->boot_cpu_frequency = boot_cpu_frequency;
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p->memctrl = memctrl;
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p->physmem = physmem;
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p->kernel_path = kernel;
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p->console_path = console;
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p->palcode = pal;
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p->boot_osflags = boot_osflags;
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p->init_param = init_param;
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p->readfile = readfile;
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p->system_type = system_type;
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p->system_rev = system_rev;
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p->bin = bin;
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p->binned_fns = binned_fns;
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p->bin_int = bin_int;
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return new FreebsdSystem(p);
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}
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REGISTER_SIM_OBJECT("FreebsdSystem", FreebsdSystem)
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