2009-04-06 03:53:15 +02:00
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// -*- mode:c++ -*-
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2010-06-02 19:58:04 +02:00
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// Copyright (c) 2010 ARM Limited
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// All rights reserved
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//
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// The license below extends only to copyright in the software and shall
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// not be construed as granting a license to any other intellectual
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// property including but not limited to intellectual property relating
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// to a hardware implementation of the functionality of the software
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// licensed hereunder. You may use the software subject to the license
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// terms below provided that you ensure that this notice is replicated
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// unmodified and in its entirety in all distributions of the software,
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// modified or unmodified, in source code or in binary form.
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//
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2009-04-06 03:53:15 +02:00
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// Copyright (c) 2007-2008 The Florida State University
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// All rights reserved.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met: redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer;
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// redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution;
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// neither the name of the copyright holders nor the names of its
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// contributors may be used to endorse or promote products derived from
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// this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Authors: Stephen Hines
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////////////////////////////////////////////////////////////////////
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//
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// Unimplemented instructions
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//
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output header {{
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/**
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* Static instruction class for unimplemented instructions that
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* cause simulator termination. Note that these are recognized
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* (legal) instructions that the simulator does not support; the
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* 'Unknown' class is used for unrecognized/illegal instructions.
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* This is a leaf class.
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*/
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class FailUnimplemented : public ArmStaticInst
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{
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public:
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/// Constructor
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2010-06-02 19:58:00 +02:00
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FailUnimplemented(const char *_mnemonic, ExtMachInst _machInst)
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2009-04-06 03:53:15 +02:00
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: ArmStaticInst(_mnemonic, _machInst, No_OpClass)
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{
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// don't call execute() (which panics) if we're on a
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// speculative path
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flags[IsNonSpeculative] = true;
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}
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%(BasicExecDeclare)s
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std::string
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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/**
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* Base class for unimplemented instructions that cause a warning
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* to be printed (but do not terminate simulation). This
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* implementation is a little screwy in that it will print a
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* warning for each instance of a particular unimplemented machine
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* instruction, not just for each unimplemented opcode. Should
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* probably make the 'warned' flag a static member of the derived
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* class.
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*/
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class WarnUnimplemented : public ArmStaticInst
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{
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private:
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/// Have we warned on this instruction yet?
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mutable bool warned;
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public:
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/// Constructor
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2010-06-02 19:58:00 +02:00
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WarnUnimplemented(const char *_mnemonic, ExtMachInst _machInst)
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2009-04-06 03:53:15 +02:00
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: ArmStaticInst(_mnemonic, _machInst, No_OpClass), warned(false)
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{
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// don't call execute() (which panics) if we're on a
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// speculative path
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flags[IsNonSpeculative] = true;
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}
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%(BasicExecDeclare)s
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std::string
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generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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}};
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output decoder {{
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std::string
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FailUnimplemented::generateDisassembly(Addr pc,
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const SymbolTable *symtab) const
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{
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return csprintf("%-10s (unimplemented)", mnemonic);
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}
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std::string
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WarnUnimplemented::generateDisassembly(Addr pc,
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const SymbolTable *symtab) const
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{
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return csprintf("%-10s (unimplemented)", mnemonic);
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}
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}};
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output exec {{
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Fault
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FailUnimplemented::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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2010-06-02 19:58:04 +02:00
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#if FULL_SYSTEM
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return new UndefinedInstruction;
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#else
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return new UndefinedInstruction(machInst, false, mnemonic);
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#endif
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2009-04-06 03:53:15 +02:00
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}
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Fault
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WarnUnimplemented::execute(%(CPU_exec_context)s *xc,
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Trace::InstRecord *traceData) const
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{
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if (!warned) {
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warn("\tinstruction '%s' unimplemented\n", mnemonic);
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warned = true;
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}
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return NoFault;
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}
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}};
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def format FailUnimpl() {{
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iop = InstObjParams(name, 'FailUnimplemented')
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decode_block = BasicDecodeWithMnemonic.subst(iop)
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}};
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def format WarnUnimpl() {{
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iop = InstObjParams(name, 'WarnUnimplemented')
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decode_block = BasicDecodeWithMnemonic.subst(iop)
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}};
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