2009-07-07 00:49:47 +02:00
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2010-01-30 05:29:17 +01:00
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/*
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* Copyright (c) 2009 Advanced Micro Devices, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "mem/physical.hh"
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2009-07-07 00:49:47 +02:00
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#include "mem/ruby/system/RubyPort.hh"
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2010-01-30 05:29:17 +01:00
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#include "mem/ruby/slicc_interface/AbstractController.hh"
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2009-07-07 00:49:47 +02:00
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//void (*RubyPort::m_hit_callback)(int64_t) = NULL;
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uint16_t RubyPort::m_num_ports = 0;
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2010-01-30 05:29:17 +01:00
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RubyPort::RubyPort(const Params *p)
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: MemObject(p)
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{
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m_version = p->version;
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assert(m_version != -1);
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m_controller = p->controller;
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assert(m_controller != NULL);
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m_mandatory_q_ptr = m_controller->getMandatoryQueue();
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m_port_id = m_num_ports++;
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m_request_cnt = 0;
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m_hit_callback = NULL;
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assert(m_num_ports <= 2048); // see below for reason
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}
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Port *
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RubyPort::getPort(const std::string &if_name, int idx)
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{
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return NULL;
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}
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