gem5/src/arch/mips/SConscript

# -*- mode:python -*-

# Copyright (c) 2004-2006 The Regents of The University of Michigan
# All rights reserved.
#
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# modification, are permitted provided that the following conditions are
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# redistributions in binary form must reproduce the above copyright
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# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# Authors: Gabe Black
#          Steve Reinhardt
#          Korey Sewell

Import('*')

if env['TARGET_ISA'] == 'mips':
    Source('faults.cc')
    Source('regfile/int_regfile.cc')
    Source('regfile/float_regfile.cc')
    Source('regfile/misc_regfile.cc')
    Source('regfile/regfile.cc')
    Source('tlb.cc')
    Source('pagetable.cc')
    Source('utility.cc')
    Source('dsp.cc')

    SimObject('MipsTLB.py')
    TraceFlag('MipsPRA')

    if env['FULL_SYSTEM']:
	SimObject('MipsSystem.py')
	SimObject('MipsInterrupts.py')
        Source('idle_event.cc')
        Source('mips_core_specific.cc')
        Source('vtophys.cc')
        Source('system.cc')
        Source('stacktrace.cc')
        Source('linux/system.cc')
	Source('interrupts.cc')
        Source('bare_iron/system.cc')
    else:
        Source('process.cc')
        Source('linux/linux.cc')
        Source('linux/process.cc')

    # Add in files generated by the ISA description.
    isa_desc_files = env.ISADesc('isa/main.isa')
    # Only non-header files need to be compiled.
    for f in isa_desc_files:
        if not f.path.endswith('.hh'):
            Source(f)