2016-03-17 14:51:18 +01:00
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/*
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* Copyright (c) 2012-2013, 2015-2016 ARM Limited
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Erik Hallnor
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* Andreas Sandberg
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* Andreas Hansson
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*/
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/** @file
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* Definition of WriteQueue class functions.
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*/
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#include "mem/cache/write_queue.hh"
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using namespace std;
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WriteQueue::WriteQueue(const std::string &_label,
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int num_entries, int reserve)
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: Queue<WriteQueueEntry>(_label, num_entries, reserve)
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{}
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WriteQueueEntry *
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WriteQueue::allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt,
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Tick when_ready, Counter order)
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{
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assert(!freeList.empty());
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WriteQueueEntry *entry = freeList.front();
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assert(entry->getNumTargets() == 0);
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freeList.pop_front();
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entry->allocate(blk_addr, blk_size, pkt, when_ready, order);
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entry->allocIter = allocatedList.insert(allocatedList.end(), entry);
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entry->readyIter = addToReadyList(entry);
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allocated += 1;
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return entry;
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}
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void
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WriteQueue::markInService(WriteQueueEntry *entry)
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{
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2016-04-21 10:48:07 +02:00
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// for a normal eviction, such as a writeback or a clean evict,
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// there is no more to do as we are done from the perspective of
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// this cache, and for uncacheable write we do not need the entry
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// as part of the response handling
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entry->popTarget();
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deallocate(entry);
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2016-03-17 14:51:18 +01:00
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}
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