592 lines
18 KiB
C
592 lines
18 KiB
C
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/*****************************************************************************
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* McPAT
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* SOFTWARE LICENSE AGREEMENT
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* Copyright 2012 Hewlett-Packard Development Company, L.P.
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* All Rights Reserved
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.”
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*
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***************************************************************************/
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#ifndef XML_PARSE_H_
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#define XML_PARSE_H_
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//#ifdef WIN32
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//#define _CRT_SECURE_NO_DEPRECATE
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//#endif
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#include <stdio.h>
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#include <string.h>
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#include <iostream>
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#include "xmlParser.h"
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using namespace std;
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/*
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void myfree(char *t); // {free(t);}
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ToXMLStringTool tx,tx2;
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*/
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//all subnodes at the level of system.core(0-n)
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//cache_policy is added into cache property arrays;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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typedef struct{
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int prediction_width;
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char prediction_scheme[20];
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int predictor_size;
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int predictor_entries;
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int local_predictor_size[20];
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int local_predictor_entries;
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int global_predictor_entries;
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int global_predictor_bits;
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int chooser_predictor_entries;
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int chooser_predictor_bits;
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double predictor_accesses;
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} predictor_systemcore;
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typedef struct{
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int number_entries;
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int cache_policy;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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double total_hits;
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double total_accesses;
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double total_misses;
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double conflicts;
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} itlb_systemcore;
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typedef struct{
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//params
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double icache_config[20];
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int buffer_sizes[20];
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int cache_policy;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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//stats
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double total_accesses;
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double read_accesses;
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double read_misses;
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double replacements;
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double read_hits;
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double total_hits;
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double total_misses;
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double miss_buffer_access;
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double fill_buffer_accesses;
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double prefetch_buffer_accesses;
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double prefetch_buffer_writes;
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double prefetch_buffer_reads;
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double prefetch_buffer_hits;
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double conflicts;
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} icache_systemcore;
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typedef struct{
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//params
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int number_entries;
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int cache_policy;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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//stats
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double total_accesses;
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double read_accesses;
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double write_accesses;
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double write_hits;
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double read_hits;
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double read_misses;
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double write_misses;
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double total_hits;
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double total_misses;
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double conflicts;
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} dtlb_systemcore;
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typedef struct{
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//params
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double dcache_config[20];
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int buffer_sizes[20];
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int cache_policy;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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//stats
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double total_accesses;
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double read_accesses;
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double write_accesses;
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double total_hits;
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double total_misses;
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double read_hits;
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double write_hits;
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double read_misses;
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double write_misses;
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double replacements;
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double write_backs;
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double miss_buffer_access;
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double fill_buffer_accesses;
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double prefetch_buffer_accesses;
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double prefetch_buffer_writes;
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double prefetch_buffer_reads;
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double prefetch_buffer_hits;
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double wbb_writes;
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double wbb_reads;
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double conflicts;
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} dcache_systemcore;
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typedef struct{
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//params
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int BTB_config[20];
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//stats
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double total_accesses;
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double read_accesses;
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double write_accesses;
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double total_hits;
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double total_misses;
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double read_hits;
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double write_hits;
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double read_misses;
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double write_misses;
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double replacements;
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} BTB_systemcore;
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typedef struct{
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//all params at the level of system.core(0-n)
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int clock_rate;
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bool opt_local;
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bool x86;
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int machine_bits;
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int virtual_address_width;
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int physical_address_width;
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int opcode_width;
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int micro_opcode_width;
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int instruction_length;
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int machine_type;
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int internal_datapath_width;
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int number_hardware_threads;
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int fetch_width;
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int number_instruction_fetch_ports;
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int decode_width;
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int issue_width;
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int peak_issue_width;
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int commit_width;
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int pipelines_per_core[20];
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int pipeline_depth[20];
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char FPU[20];
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char divider_multiplier[20];
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int ALU_per_core;
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double FPU_per_core;
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int MUL_per_core;
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int instruction_buffer_size;
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int decoded_stream_buffer_size;
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int instruction_window_scheme;
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int instruction_window_size;
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int fp_instruction_window_size;
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int ROB_size;
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int archi_Regs_IRF_size;
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int archi_Regs_FRF_size;
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int phy_Regs_IRF_size;
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int phy_Regs_FRF_size;
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int rename_scheme;
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int register_windows_size;
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char LSU_order[20];
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int store_buffer_size;
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int load_buffer_size;
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int memory_ports;
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char Dcache_dual_pump[20];
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int RAS_size;
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int fp_issue_width;
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int prediction_width;
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int number_of_BTB;
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int number_of_BPT;
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//all stats at the level of system.core(0-n)
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double total_instructions;
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double int_instructions;
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double fp_instructions;
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double branch_instructions;
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double branch_mispredictions;
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double committed_instructions;
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double committed_int_instructions;
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double committed_fp_instructions;
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double load_instructions;
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double store_instructions;
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double total_cycles;
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double idle_cycles;
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double busy_cycles;
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double instruction_buffer_reads;
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double instruction_buffer_write;
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double ROB_reads;
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double ROB_writes;
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double rename_accesses;
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double fp_rename_accesses;
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double rename_reads;
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double rename_writes;
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double fp_rename_reads;
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double fp_rename_writes;
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double inst_window_reads;
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double inst_window_writes;
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double inst_window_wakeup_accesses;
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double inst_window_selections;
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double fp_inst_window_reads;
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double fp_inst_window_writes;
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double fp_inst_window_wakeup_accesses;
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double fp_inst_window_selections;
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double archi_int_regfile_reads;
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double archi_float_regfile_reads;
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double phy_int_regfile_reads;
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double phy_float_regfile_reads;
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double phy_int_regfile_writes;
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double phy_float_regfile_writes;
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double archi_int_regfile_writes;
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double archi_float_regfile_writes;
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double int_regfile_reads;
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double float_regfile_reads;
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double int_regfile_writes;
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double float_regfile_writes;
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double windowed_reg_accesses;
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double windowed_reg_transports;
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double function_calls;
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double context_switches;
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double ialu_accesses;
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double fpu_accesses;
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double mul_accesses;
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double cdb_alu_accesses;
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double cdb_mul_accesses;
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double cdb_fpu_accesses;
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double load_buffer_reads;
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double load_buffer_writes;
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double load_buffer_cams;
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double store_buffer_reads;
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double store_buffer_writes;
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double store_buffer_cams;
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double store_buffer_forwards;
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double main_memory_access;
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double main_memory_read;
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double main_memory_write;
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double pipeline_duty_cycle;
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double IFU_duty_cycle ;
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double BR_duty_cycle ;
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double LSU_duty_cycle ;
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double MemManU_I_duty_cycle;
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double MemManU_D_duty_cycle ;
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double ALU_duty_cycle ;
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double MUL_duty_cycle ;
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double FPU_duty_cycle ;
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double ALU_cdb_duty_cycle ;
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double MUL_cdb_duty_cycle ;
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double FPU_cdb_duty_cycle ;
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//all subnodes at the level of system.core(0-n)
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predictor_systemcore predictor;
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itlb_systemcore itlb;
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icache_systemcore icache;
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dtlb_systemcore dtlb;
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dcache_systemcore dcache;
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BTB_systemcore BTB;
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} system_core;
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typedef struct{
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//params
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int Directory_type;
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double Dir_config[20];
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int buffer_sizes[20];
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int clockrate;
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int ports[20];
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int device_type;
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int cache_policy;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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char threeD_stack[20];
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//stats
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double total_accesses;
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double read_accesses;
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double write_accesses;
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double read_misses;
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double write_misses;
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double conflicts;
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double duty_cycle;
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} system_L1Directory;
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typedef struct{
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//params
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int Directory_type;
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double Dir_config[20];
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int buffer_sizes[20];
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int clockrate;
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int ports[20];
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int device_type;
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int cache_policy;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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char threeD_stack[20];
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//stats
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double total_accesses;
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double read_accesses;
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double write_accesses;
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double read_misses;
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double write_misses;
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double conflicts;
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double duty_cycle;
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} system_L2Directory;
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typedef struct{
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//params
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double L2_config[20];
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int clockrate;
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int ports[20];
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int device_type;
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int cache_policy;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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char threeD_stack[20];
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int buffer_sizes[20];
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//stats
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double total_accesses;
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double read_accesses;
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double write_accesses;
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double total_hits;
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double total_misses;
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double read_hits;
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double write_hits;
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double read_misses;
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double write_misses;
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double replacements;
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double write_backs;
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double miss_buffer_accesses;
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double fill_buffer_accesses;
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double prefetch_buffer_accesses;
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double prefetch_buffer_writes;
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double prefetch_buffer_reads;
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double prefetch_buffer_hits;
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double wbb_writes;
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double wbb_reads;
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double conflicts;
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double duty_cycle;
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bool merged_dir;
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double homenode_read_accesses;
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double homenode_write_accesses;
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double homenode_read_hits;
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double homenode_write_hits;
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double homenode_read_misses;
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double homenode_write_misses;
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double dir_duty_cycle;
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} system_L2;
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typedef struct{
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//params
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double L3_config[20];
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int clockrate;
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int ports[20];
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int device_type;
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int cache_policy;//0 no write or write-though with non-write allocate;1 write-back with write-allocate
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char threeD_stack[20];
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int buffer_sizes[20];
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//stats
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double total_accesses;
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double read_accesses;
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double write_accesses;
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double total_hits;
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double total_misses;
|
||
|
|
double read_hits;
|
||
|
|
double write_hits;
|
||
|
|
double read_misses;
|
||
|
|
double write_misses;
|
||
|
|
double replacements;
|
||
|
|
double write_backs;
|
||
|
|
double miss_buffer_accesses;
|
||
|
|
double fill_buffer_accesses;
|
||
|
|
double prefetch_buffer_accesses;
|
||
|
|
double prefetch_buffer_writes;
|
||
|
|
double prefetch_buffer_reads;
|
||
|
|
double prefetch_buffer_hits;
|
||
|
|
double wbb_writes;
|
||
|
|
double wbb_reads;
|
||
|
|
double conflicts;
|
||
|
|
double duty_cycle;
|
||
|
|
|
||
|
|
bool merged_dir;
|
||
|
|
double homenode_read_accesses;
|
||
|
|
double homenode_write_accesses;
|
||
|
|
double homenode_read_hits;
|
||
|
|
double homenode_write_hits;
|
||
|
|
double homenode_read_misses;
|
||
|
|
double homenode_write_misses;
|
||
|
|
double dir_duty_cycle;
|
||
|
|
} system_L3;
|
||
|
|
typedef struct{
|
||
|
|
//params
|
||
|
|
int number_of_inputs_of_crossbars;
|
||
|
|
int number_of_outputs_of_crossbars;
|
||
|
|
int flit_bits;
|
||
|
|
int input_buffer_entries_per_port;
|
||
|
|
int ports_of_input_buffer[20];
|
||
|
|
//stats
|
||
|
|
double crossbar_accesses;
|
||
|
|
} xbar0_systemNoC;
|
||
|
|
typedef struct{
|
||
|
|
//params
|
||
|
|
int clockrate;
|
||
|
|
bool type;
|
||
|
|
bool has_global_link;
|
||
|
|
char topology[20];
|
||
|
|
int horizontal_nodes;
|
||
|
|
int vertical_nodes;
|
||
|
|
int link_throughput;
|
||
|
|
int link_latency;
|
||
|
|
int input_ports;
|
||
|
|
int output_ports;
|
||
|
|
int virtual_channel_per_port;
|
||
|
|
int flit_bits;
|
||
|
|
int input_buffer_entries_per_vc;
|
||
|
|
int ports_of_input_buffer[20];
|
||
|
|
int dual_pump;
|
||
|
|
int number_of_crossbars;
|
||
|
|
char crossbar_type[20];
|
||
|
|
char crosspoint_type[20];
|
||
|
|
xbar0_systemNoC xbar0;
|
||
|
|
int arbiter_type;
|
||
|
|
double chip_coverage;
|
||
|
|
//stats
|
||
|
|
double total_accesses;
|
||
|
|
double duty_cycle;
|
||
|
|
double route_over_perc;
|
||
|
|
} system_NoC;
|
||
|
|
typedef struct{
|
||
|
|
//params
|
||
|
|
int mem_tech_node;
|
||
|
|
int device_clock;
|
||
|
|
int peak_transfer_rate;
|
||
|
|
int internal_prefetch_of_DRAM_chip;
|
||
|
|
int capacity_per_channel;
|
||
|
|
int number_ranks;
|
||
|
|
int num_banks_of_DRAM_chip;
|
||
|
|
int Block_width_of_DRAM_chip;
|
||
|
|
int output_width_of_DRAM_chip;
|
||
|
|
int page_size_of_DRAM_chip;
|
||
|
|
int burstlength_of_DRAM_chip;
|
||
|
|
//stats
|
||
|
|
double memory_accesses;
|
||
|
|
double memory_reads;
|
||
|
|
double memory_writes;
|
||
|
|
} system_mem;
|
||
|
|
typedef struct{
|
||
|
|
//params
|
||
|
|
//Common Param for mc and fc
|
||
|
|
double peak_transfer_rate;
|
||
|
|
int number_mcs;
|
||
|
|
bool withPHY;
|
||
|
|
int type;
|
||
|
|
|
||
|
|
//FCParam
|
||
|
|
//stats
|
||
|
|
double duty_cycle;
|
||
|
|
double total_load_perc;
|
||
|
|
|
||
|
|
//McParam
|
||
|
|
int mc_clock;
|
||
|
|
int llc_line_length;
|
||
|
|
int memory_channels_per_mc;
|
||
|
|
int number_ranks;
|
||
|
|
int req_window_size_per_channel;
|
||
|
|
int IO_buffer_size_per_channel;
|
||
|
|
int databus_width;
|
||
|
|
int addressbus_width;
|
||
|
|
bool LVDS;
|
||
|
|
|
||
|
|
//stats
|
||
|
|
double memory_accesses;
|
||
|
|
double memory_reads;
|
||
|
|
double memory_writes;
|
||
|
|
} system_mc;
|
||
|
|
|
||
|
|
typedef struct{
|
||
|
|
//params
|
||
|
|
int clockrate;
|
||
|
|
int number_units;
|
||
|
|
int type;
|
||
|
|
//stats
|
||
|
|
double duty_cycle;
|
||
|
|
double total_load_perc;
|
||
|
|
} system_niu;
|
||
|
|
|
||
|
|
typedef struct{
|
||
|
|
//params
|
||
|
|
int clockrate;
|
||
|
|
int number_units;
|
||
|
|
int num_channels;
|
||
|
|
int type;
|
||
|
|
bool withPHY;
|
||
|
|
//stats
|
||
|
|
double duty_cycle;
|
||
|
|
double total_load_perc;
|
||
|
|
} system_pcie;
|
||
|
|
|
||
|
|
typedef struct{
|
||
|
|
//All number_of_* at the level of 'system' Ying 03/21/2009
|
||
|
|
int number_of_cores;
|
||
|
|
int number_of_L1Directories;
|
||
|
|
int number_of_L2Directories;
|
||
|
|
int number_of_L2s;
|
||
|
|
bool Private_L2;
|
||
|
|
int number_of_L3s;
|
||
|
|
int number_of_NoCs;
|
||
|
|
int number_of_dir_levels;
|
||
|
|
int domain_size;
|
||
|
|
int first_level_dir;
|
||
|
|
// All params at the level of 'system'
|
||
|
|
int homogeneous_cores;
|
||
|
|
int homogeneous_L1Directories;
|
||
|
|
int homogeneous_L2Directories;
|
||
|
|
double core_tech_node;
|
||
|
|
int target_core_clockrate;
|
||
|
|
int target_chip_area;
|
||
|
|
int temperature;
|
||
|
|
int number_cache_levels;
|
||
|
|
int L1_property;
|
||
|
|
int L2_property;
|
||
|
|
int homogeneous_L2s;
|
||
|
|
int L3_property;
|
||
|
|
int homogeneous_L3s;
|
||
|
|
int homogeneous_NoCs;
|
||
|
|
int homogeneous_ccs;
|
||
|
|
int Max_area_deviation;
|
||
|
|
int Max_power_deviation;
|
||
|
|
int device_type;
|
||
|
|
bool longer_channel_device;
|
||
|
|
bool Embedded;
|
||
|
|
bool opt_dynamic_power;
|
||
|
|
bool opt_lakage_power;
|
||
|
|
bool opt_clockrate;
|
||
|
|
bool opt_area;
|
||
|
|
int interconnect_projection_type;
|
||
|
|
int machine_bits;
|
||
|
|
int virtual_address_width;
|
||
|
|
int physical_address_width;
|
||
|
|
int virtual_memory_page_size;
|
||
|
|
double total_cycles;
|
||
|
|
//system.core(0-n):3rd level
|
||
|
|
system_core core[64];
|
||
|
|
system_L1Directory L1Directory[64];
|
||
|
|
system_L2Directory L2Directory[64];
|
||
|
|
system_L2 L2[64];
|
||
|
|
system_L3 L3[64];
|
||
|
|
system_NoC NoC[64];
|
||
|
|
system_mem mem;
|
||
|
|
system_mc mc;
|
||
|
|
system_mc flashc;
|
||
|
|
system_niu niu;
|
||
|
|
system_pcie pcie;
|
||
|
|
} root_system;
|
||
|
|
|
||
|
|
class ParseXML
|
||
|
|
{
|
||
|
|
public:
|
||
|
|
void parse(char* filepath);
|
||
|
|
void initialize();
|
||
|
|
public:
|
||
|
|
root_system sys;
|
||
|
|
};
|
||
|
|
|
||
|
|
|
||
|
|
#endif /* XML_PARSE_H_ */
|
||
|
|
|
||
|
|
|
||
|
|
|
||
|
|
|