119 lines
3.2 KiB
C++
119 lines
3.2 KiB
C++
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/*
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* Copyright (c) 2003-2005 The Regents of The University of Michigan
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* Copyright (c) 2007-2008 The Florida State University
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* Copyright (c) 2009 The University of Edinburgh
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Korey Sewell
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* Stephen Hines
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* Timothy M. Jones
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*/
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#ifndef __ARCH_POWER_UTILITY_HH__
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#define __ARCH_POWER_UTILITY_HH__
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#include "arch/power/miscregs.hh"
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#include "arch/power/types.hh"
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#include "base/hashmap.hh"
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#include "base/types.hh"
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#include "cpu/thread_context.hh"
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namespace __hash_namespace {
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template<>
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struct hash<PowerISA::ExtMachInst> : public hash<uint32_t> {
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size_t operator()(const PowerISA::ExtMachInst &emi) const {
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return hash<uint32_t>::operator()((uint32_t)emi);
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};
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};
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} // __hash_namespace namespace
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namespace PowerISA {
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/**
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* Function to ensure ISA semantics about 0 registers.
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* @param tc The thread context.
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*/
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template <class TC>
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void zeroRegisters(TC *tc);
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// Instruction address compression hooks
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static inline Addr
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realPCToFetchPC(const Addr &addr)
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{
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return addr;
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}
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static inline Addr
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fetchPCToRealPC(const Addr &addr)
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{
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return addr;
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}
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// the size of "fetched" instructions
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static inline size_t
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fetchInstSize()
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{
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return sizeof(MachInst);
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}
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static inline MachInst
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makeRegisterCopy(int dest, int src)
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{
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panic("makeRegisterCopy not implemented");
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return 0;
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}
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inline void
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startupCPU(ThreadContext *tc, int cpuId)
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{
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tc->activate(0);
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}
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template <class XC>
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Fault
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checkFpEnableFault(XC *xc)
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{
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return NoFault;
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}
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static inline void
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copyRegs(ThreadContext *src, ThreadContext *dest)
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{
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panic("Copy Regs Not Implemented Yet\n");
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}
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static inline void
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copyMiscRegs(ThreadContext *src, ThreadContext *dest)
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{
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panic("Copy Misc. Regs Not Implemented Yet\n");
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}
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} // PowerISA namespace
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#endif // __ARCH_POWER_UTILITY_HH__
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