2009-05-11 19:38:43 +02:00
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/*
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* Copyright (c) 1999-2008 Mark D. Hill and David A. Wood
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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2009-07-07 00:49:47 +02:00
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* Topology.cc
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2009-05-11 19:38:43 +02:00
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*
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2009-07-07 00:49:47 +02:00
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* Description: See Topology.hh
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2009-05-11 19:38:43 +02:00
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*
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* $Id$
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*
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* */
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2009-05-11 19:38:45 +02:00
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#include "mem/ruby/network/simple/Topology.hh"
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#include "mem/ruby/common/NetDest.hh"
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#include "mem/ruby/network/Network.hh"
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#include "mem/protocol/TopologyType.hh"
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#include "mem/gems_common/util.hh"
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#include "mem/protocol/MachineType.hh"
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#include "mem/protocol/Protocol.hh"
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2009-07-07 00:49:47 +02:00
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#include "mem/ruby/system/System.hh"
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2009-05-11 19:38:43 +02:00
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#include <string>
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static const int INFINITE_LATENCY = 10000; // Yes, this is a big hack
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static const int DEFAULT_BW_MULTIPLIER = 1; // Just to be consistent with above :)
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// Note: In this file, we use the first 2*m_nodes SwitchIDs to
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// represent the input and output endpoint links. These really are
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// not 'switches', as they will not have a Switch object allocated for
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// them. The first m_nodes SwitchIDs are the links into the network,
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// the second m_nodes set of SwitchIDs represent the the output queues
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// of the network.
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// Helper functions based on chapter 29 of Cormen et al.
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2009-07-07 00:49:47 +02:00
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static void extend_shortest_path(Matrix& current_dist, Matrix& latencies, Matrix& inter_switches);
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2009-05-11 19:38:43 +02:00
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static Matrix shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches);
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static bool link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final, const Matrix& weights, const Matrix& dist);
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static NetDest shortest_path_to_node(SwitchID src, SwitchID next, const Matrix& weights, const Matrix& dist);
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2010-01-30 05:29:17 +01:00
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Topology::Topology(const Params *p)
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: SimObject(p)
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2009-05-11 19:38:43 +02:00
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{
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2010-01-30 05:29:17 +01:00
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// m_network_ptr = p->network;
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m_connections = p->connections;
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m_print_config = p->print_config;
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2009-07-07 00:49:47 +02:00
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m_nodes = MachineType_base_number(MachineType_NUM);
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2009-05-11 19:38:43 +02:00
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m_number_of_switches = 0;
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}
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2010-01-30 05:29:17 +01:00
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void Topology::init()
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2009-05-11 19:38:43 +02:00
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{
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}
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2009-07-07 00:49:47 +02:00
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void Topology::makeTopology()
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2009-05-11 19:38:43 +02:00
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{
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2009-07-07 00:49:47 +02:00
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/*
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if (m_nodes == 1) {
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SwitchID id = newSwitchID();
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addLink(0, id, m_network_ptr->getOffChipLinkLatency());
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addLink(id, 1, m_network_ptr->getOffChipLinkLatency());
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return;
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2009-05-11 19:38:43 +02:00
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}
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2009-07-07 00:49:47 +02:00
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*/
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assert(m_nodes > 1);
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2009-05-11 19:38:43 +02:00
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Vector< Vector < SwitchID > > nodePairs; // node pairs extracted from the file
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Vector<int> latencies; // link latencies for each link extracted
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Vector<int> bw_multis; // bw multipliers for each link extracted
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Vector<int> weights; // link weights used to enfore e-cube deadlock free routing
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Vector< SwitchID > int_network_switches; // internal switches extracted from the file
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Vector<bool> endpointConnectionExist; // used to ensure all endpoints are connected to the network
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endpointConnectionExist.setSize(m_nodes);
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// initialize endpoint check vector
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for (int k = 0; k < endpointConnectionExist.size(); k++) {
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endpointConnectionExist[k] = false;
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}
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2009-07-07 00:49:47 +02:00
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stringstream networkFile( m_connections );
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2009-05-11 19:38:43 +02:00
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string line = "";
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while (!networkFile.eof()) {
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Vector < SwitchID > nodes;
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nodes.setSize(2);
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int latency = -1; // null latency
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int weight = -1; // null weight
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int bw_multiplier = DEFAULT_BW_MULTIPLIER; // default multiplier incase the network file doesn't define it
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int i = 0; // node pair index
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int varsFound = 0; // number of varsFound on the line
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int internalNodes = 0; // used to determine if the link is between 2 internal nodes
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std::getline(networkFile, line, '\n');
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string varStr = string_split(line, ' ');
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// parse the current line in the file
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while (varStr != "") {
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string label = string_split(varStr, ':');
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// valid node labels
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if (label == "ext_node" || label == "int_node") {
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ASSERT(i < 2); // one link between 2 switches per line
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varsFound++;
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bool isNewIntSwitch = true;
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if (label == "ext_node") { // input link to node
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MachineType machine = string_to_MachineType(string_split(varStr, ':'));
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string nodeStr = string_split(varStr, ':');
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2009-07-07 00:49:47 +02:00
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nodes[i] = MachineType_base_number(machine)
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+ atoi(nodeStr.c_str());
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2009-05-11 19:38:43 +02:00
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// in nodes should be numbered 0 to m_nodes-1
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ASSERT(nodes[i] >= 0 && nodes[i] < m_nodes);
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isNewIntSwitch = false;
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endpointConnectionExist[nodes[i]] = true;
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}
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if (label == "int_node") { // interior node
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nodes[i] = atoi((string_split(varStr, ':')).c_str())+m_nodes*2;
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// in nodes should be numbered >= m_nodes*2
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ASSERT(nodes[i] >= m_nodes*2);
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for (int k = 0; k < int_network_switches.size(); k++) {
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if (int_network_switches[k] == nodes[i]) {
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isNewIntSwitch = false;
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}
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}
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if (isNewIntSwitch) { // if internal switch
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m_number_of_switches++;
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int_network_switches.insertAtBottom(nodes[i]);
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}
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internalNodes++;
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}
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i++;
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} else if (label == "link_latency") {
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latency = atoi((string_split(varStr, ':')).c_str());
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varsFound++;
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} else if (label == "bw_multiplier") { // not necessary, defaults to DEFAULT_BW_MULTIPLIER
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bw_multiplier = atoi((string_split(varStr, ':')).c_str());
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} else if (label == "link_weight") { // not necessary, defaults to link_latency
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weight = atoi((string_split(varStr, ':')).c_str());
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} else {
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cerr << "Error: Unexpected Identifier: " << label << endl;
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exit(1);
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}
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varStr = string_split(line, ' ');
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}
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if (varsFound == 3) { // all three necessary link variables where found so add the link
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nodePairs.insertAtBottom(nodes);
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latencies.insertAtBottom(latency);
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if (weight != -1) {
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weights.insertAtBottom(weight);
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} else {
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weights.insertAtBottom(latency);
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}
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bw_multis.insertAtBottom(bw_multiplier);
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Vector < SwitchID > otherDirectionNodes;
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otherDirectionNodes.setSize(2);
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otherDirectionNodes[0] = nodes[1];
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if (internalNodes == 2) { // this is an internal link
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otherDirectionNodes[1] = nodes[0];
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} else {
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otherDirectionNodes[1] = nodes[0]+m_nodes;
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}
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nodePairs.insertAtBottom(otherDirectionNodes);
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latencies.insertAtBottom(latency);
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if (weight != -1) {
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weights.insertAtBottom(weight);
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} else {
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weights.insertAtBottom(latency);
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}
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bw_multis.insertAtBottom(bw_multiplier);
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} else {
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if (varsFound != 0) { // if this is not a valid link, then no vars should have been found
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cerr << "Error in line: " << line << endl;
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exit(1);
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}
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}
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} // end of file
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// makes sure all enpoints are connected in the soon to be created network
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for (int k = 0; k < endpointConnectionExist.size(); k++) {
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if (endpointConnectionExist[k] == false) {
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cerr << "Error: Unconnected Endpoint: " << k << endl;
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exit(1);
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}
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}
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ASSERT(nodePairs.size() == latencies.size() && latencies.size() == bw_multis.size() && latencies.size() == weights.size())
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for (int k = 0; k < nodePairs.size(); k++) {
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ASSERT(nodePairs[k].size() == 2);
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addLink(nodePairs[k][0], nodePairs[k][1], latencies[k], bw_multis[k], weights[k]);
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}
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2009-07-07 00:49:47 +02:00
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// initialize component latencies record
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m_component_latencies.setSize(0);
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m_component_inter_switches.setSize(0);
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2009-05-11 19:38:43 +02:00
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}
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2009-07-07 00:49:47 +02:00
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2009-05-11 19:38:43 +02:00
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void Topology::createLinks(bool isReconfiguration)
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{
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// Find maximum switchID
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SwitchID max_switch_id = 0;
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for (int i=0; i<m_links_src_vector.size(); i++) {
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max_switch_id = max(max_switch_id, m_links_src_vector[i]);
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max_switch_id = max(max_switch_id, m_links_dest_vector[i]);
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}
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// Initialize weight vector
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Matrix topology_weights;
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Matrix topology_latency;
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Matrix topology_bw_multis;
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int num_switches = max_switch_id+1;
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topology_weights.setSize(num_switches);
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topology_latency.setSize(num_switches);
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topology_bw_multis.setSize(num_switches);
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m_component_latencies.setSize(num_switches); // FIXME setting the size of a member variable here is a HACK!
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m_component_inter_switches.setSize(num_switches); // FIXME setting the size of a member variable here is a HACK!
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for(int i=0; i<topology_weights.size(); i++) {
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topology_weights[i].setSize(num_switches);
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topology_latency[i].setSize(num_switches);
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topology_bw_multis[i].setSize(num_switches);
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m_component_latencies[i].setSize(num_switches);
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m_component_inter_switches[i].setSize(num_switches); // FIXME setting the size of a member variable here is a HACK!
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for(int j=0; j<topology_weights[i].size(); j++) {
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topology_weights[i][j] = INFINITE_LATENCY;
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topology_latency[i][j] = -1; // initialize to an invalid value
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topology_bw_multis[i][j] = -1; // initialize to an invalid value
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m_component_latencies[i][j] = -1; // initialize to an invalid value
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m_component_inter_switches[i][j] = 0; // initially assume direct connections / no intermediate switches between components
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}
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}
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// Set identity weights to zero
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for(int i=0; i<topology_weights.size(); i++) {
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topology_weights[i][i] = 0;
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}
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// Fill in the topology weights and bandwidth multipliers
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for (int i=0; i<m_links_src_vector.size(); i++) {
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topology_weights[m_links_src_vector[i]][m_links_dest_vector[i]] = m_links_weight_vector[i];
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topology_latency[m_links_src_vector[i]][m_links_dest_vector[i]] = m_links_latency_vector[i];
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m_component_latencies[m_links_src_vector[i]][m_links_dest_vector[i]] = m_links_latency_vector[i]; // initialize to latency vector
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topology_bw_multis[m_links_src_vector[i]][m_links_dest_vector[i]] = m_bw_multiplier_vector[i];
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}
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// Walk topology and hookup the links
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Matrix dist = shortest_path(topology_weights, m_component_latencies, m_component_inter_switches);
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for(int i=0; i<topology_weights.size(); i++) {
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for(int j=0; j<topology_weights[i].size(); j++) {
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int weight = topology_weights[i][j];
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int bw_multiplier = topology_bw_multis[i][j];
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int latency = topology_latency[i][j];
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if (weight > 0 && weight != INFINITE_LATENCY) {
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NetDest destination_set = shortest_path_to_node(i, j, topology_weights, dist);
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assert(latency != -1);
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makeLink(i, j, destination_set, latency, weight, bw_multiplier, isReconfiguration);
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}
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}
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}
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}
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SwitchID Topology::newSwitchID()
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{
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m_number_of_switches++;
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return m_number_of_switches-1+m_nodes+m_nodes;
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}
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void Topology::addLink(SwitchID src, SwitchID dest, int link_latency)
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{
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addLink(src, dest, link_latency, DEFAULT_BW_MULTIPLIER, link_latency);
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}
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void Topology::addLink(SwitchID src, SwitchID dest, int link_latency, int bw_multiplier)
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{
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addLink(src, dest, link_latency, bw_multiplier, link_latency);
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}
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void Topology::addLink(SwitchID src, SwitchID dest, int link_latency, int bw_multiplier, int link_weight)
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{
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ASSERT(src <= m_number_of_switches+m_nodes+m_nodes);
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ASSERT(dest <= m_number_of_switches+m_nodes+m_nodes);
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m_links_src_vector.insertAtBottom(src);
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m_links_dest_vector.insertAtBottom(dest);
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m_links_latency_vector.insertAtBottom(link_latency);
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m_links_weight_vector.insertAtBottom(link_weight);
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m_bw_multiplier_vector.insertAtBottom(bw_multiplier);
|
|
|
|
}
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|
|
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|
|
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|
void Topology::makeLink(SwitchID src, SwitchID dest, const NetDest& routing_table_entry, int link_latency, int link_weight, int bw_multiplier, bool isReconfiguration)
|
|
|
|
{
|
|
|
|
// Make sure we're not trying to connect two end-point nodes directly together
|
|
|
|
assert((src >= 2*m_nodes) || (dest >= 2*m_nodes));
|
|
|
|
|
|
|
|
if (src < m_nodes) {
|
|
|
|
m_network_ptr->makeInLink(src, dest-(2*m_nodes), routing_table_entry, link_latency, bw_multiplier, isReconfiguration);
|
|
|
|
} else if (dest < 2*m_nodes) {
|
|
|
|
assert(dest >= m_nodes);
|
|
|
|
NodeID node = dest-m_nodes;
|
|
|
|
m_network_ptr->makeOutLink(src-(2*m_nodes), node, routing_table_entry, link_latency, link_weight, bw_multiplier, isReconfiguration);
|
|
|
|
} else {
|
|
|
|
assert((src >= 2*m_nodes) && (dest >= 2*m_nodes));
|
|
|
|
m_network_ptr->makeInternalLink(src-(2*m_nodes), dest-(2*m_nodes), routing_table_entry, link_latency, link_weight, bw_multiplier, isReconfiguration);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void Topology::printConfig(ostream& out) const
|
|
|
|
{
|
2009-07-07 00:49:47 +02:00
|
|
|
if (m_print_config == false) return;
|
|
|
|
|
2009-05-11 19:38:43 +02:00
|
|
|
assert(m_component_latencies.size() > 0);
|
|
|
|
|
|
|
|
out << "--- Begin Topology Print ---" << endl;
|
|
|
|
out << endl;
|
|
|
|
out << "Topology print ONLY indicates the _NETWORK_ latency between two machines" << endl;
|
|
|
|
out << "It does NOT include the latency within the machines" << endl;
|
|
|
|
out << endl;
|
|
|
|
for (int m=0; m<MachineType_NUM; m++) {
|
|
|
|
for (int i=0; i<MachineType_base_count((MachineType)m); i++) {
|
|
|
|
MachineID cur_mach = {(MachineType)m, i};
|
|
|
|
out << cur_mach << " Network Latencies" << endl;
|
|
|
|
for (int n=0; n<MachineType_NUM; n++) {
|
|
|
|
for (int j=0; j<MachineType_base_count((MachineType)n); j++) {
|
|
|
|
MachineID dest_mach = {(MachineType)n, j};
|
|
|
|
if (cur_mach != dest_mach) {
|
|
|
|
int link_latency = m_component_latencies[MachineType_base_number((MachineType)m)+i][MachineType_base_number(MachineType_NUM)+MachineType_base_number((MachineType)n)+j];
|
|
|
|
int intermediate_switches = m_component_inter_switches[MachineType_base_number((MachineType)m)+i][MachineType_base_number(MachineType_NUM)+MachineType_base_number((MachineType)n)+j];
|
|
|
|
out << " " << cur_mach << " -> " << dest_mach << " net_lat: "
|
|
|
|
<< link_latency+intermediate_switches << endl; // NOTE switches are assumed to have single cycle latency
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
out << endl;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
out << "--- End Topology Print ---" << endl;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**************************************************************************/
|
|
|
|
|
|
|
|
// The following all-pairs shortest path algorithm is based on the
|
|
|
|
// discussion from Cormen et al., Chapter 26.1.
|
|
|
|
|
|
|
|
static void extend_shortest_path(Matrix& current_dist, Matrix& latencies, Matrix& inter_switches)
|
|
|
|
{
|
|
|
|
bool change = true;
|
|
|
|
int nodes = current_dist.size();
|
|
|
|
|
|
|
|
while (change) {
|
|
|
|
change = false;
|
|
|
|
for (int i=0; i<nodes; i++) {
|
|
|
|
for (int j=0; j<nodes; j++) {
|
|
|
|
int minimum = current_dist[i][j];
|
|
|
|
int previous_minimum = minimum;
|
|
|
|
int intermediate_switch = -1;
|
|
|
|
for (int k=0; k<nodes; k++) {
|
|
|
|
minimum = min(minimum, current_dist[i][k] + current_dist[k][j]);
|
|
|
|
if (previous_minimum != minimum) {
|
|
|
|
intermediate_switch = k;
|
|
|
|
inter_switches[i][j] = inter_switches[i][k] + inter_switches[k][j] + 1;
|
|
|
|
}
|
|
|
|
previous_minimum = minimum;
|
|
|
|
}
|
|
|
|
if (current_dist[i][j] != minimum) {
|
|
|
|
change = true;
|
|
|
|
current_dist[i][j] = minimum;
|
|
|
|
assert(intermediate_switch >= 0);
|
|
|
|
assert(intermediate_switch < latencies[i].size());
|
|
|
|
latencies[i][j] = latencies[i][intermediate_switch] + latencies[intermediate_switch][j];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static Matrix shortest_path(const Matrix& weights, Matrix& latencies, Matrix& inter_switches)
|
|
|
|
{
|
|
|
|
Matrix dist = weights;
|
|
|
|
extend_shortest_path(dist, latencies, inter_switches);
|
|
|
|
return dist;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool link_is_shortest_path_to_node(SwitchID src, SwitchID next, SwitchID final,
|
|
|
|
const Matrix& weights, const Matrix& dist)
|
|
|
|
{
|
|
|
|
return (weights[src][next] + dist[next][final] == dist[src][final]);
|
|
|
|
}
|
|
|
|
|
|
|
|
static NetDest shortest_path_to_node(SwitchID src, SwitchID next,
|
|
|
|
const Matrix& weights, const Matrix& dist)
|
|
|
|
{
|
|
|
|
NetDest result;
|
|
|
|
int d = 0;
|
|
|
|
int machines;
|
|
|
|
int max_machines;
|
|
|
|
|
|
|
|
machines = MachineType_NUM;
|
|
|
|
max_machines = MachineType_base_number(MachineType_NUM);
|
|
|
|
|
|
|
|
for (int m=0; m<machines; m++) {
|
|
|
|
for (int i=0; i<MachineType_base_count((MachineType)m); i++) {
|
|
|
|
// we use "d+max_machines" below since the "destination" switches for the machines are numbered
|
|
|
|
// [MachineType_base_number(MachineType_NUM)...2*MachineType_base_number(MachineType_NUM)-1]
|
|
|
|
// for the component network
|
|
|
|
if (link_is_shortest_path_to_node(src, next,
|
|
|
|
d+max_machines,
|
|
|
|
weights, dist)) {
|
|
|
|
MachineID mach = {(MachineType)m, i};
|
|
|
|
result.add(mach);
|
|
|
|
}
|
|
|
|
d++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
DEBUG_MSG(NETWORK_COMP, MedPrio, "returning shortest path");
|
|
|
|
DEBUG_EXPR(NETWORK_COMP, MedPrio, (src-(2*max_machines)));
|
|
|
|
DEBUG_EXPR(NETWORK_COMP, MedPrio, (next-(2*max_machines)));
|
|
|
|
DEBUG_EXPR(NETWORK_COMP, MedPrio, src);
|
|
|
|
DEBUG_EXPR(NETWORK_COMP, MedPrio, next);
|
|
|
|
DEBUG_EXPR(NETWORK_COMP, MedPrio, result);
|
|
|
|
DEBUG_NEWLINE(NETWORK_COMP, MedPrio);
|
|
|
|
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2010-01-30 05:29:17 +01:00
|
|
|
Topology *
|
|
|
|
TopologyParams::create()
|
|
|
|
{
|
|
|
|
return new Topology(this);
|
|
|
|
}
|