2004-05-17 19:22:19 +02:00
|
|
|
/*
|
2004-06-08 19:37:27 +02:00
|
|
|
* Copyright (c) 2004 The Regents of The University of Michigan
|
2004-05-17 19:22:19 +02:00
|
|
|
* All rights reserved.
|
|
|
|
|
*
|
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
|
* modification, are permitted provided that the following conditions are
|
|
|
|
|
* met: redistributions of source code must retain the above copyright
|
|
|
|
|
* notice, this list of conditions and the following disclaimer;
|
|
|
|
|
* redistributions in binary form must reproduce the above copyright
|
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
|
* documentation and/or other materials provided with the distribution;
|
|
|
|
|
* neither the name of the copyright holders nor the names of its
|
|
|
|
|
* contributors may be used to endorse or promote products derived from
|
|
|
|
|
* this software without specific prior written permission.
|
|
|
|
|
*
|
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
|
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
|
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
|
|
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
|
|
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
|
|
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
|
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
|
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
|
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
|
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
|
|
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#include "cpu/exec_context.hh"
|
|
|
|
|
#include "cpu/base_cpu.hh"
|
|
|
|
|
#include "cpu/full_cpu/bpred.hh"
|
|
|
|
|
#include "cpu/full_cpu/full_cpu.hh"
|
2004-08-20 17:35:31 +02:00
|
|
|
#include "kern/kernel_stats.hh"
|
2004-05-17 19:22:19 +02:00
|
|
|
#include "kern/system_events.hh"
|
|
|
|
|
#include "sim/system.hh"
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
SkipFuncEvent::process(ExecContext *xc)
|
|
|
|
|
{
|
|
|
|
|
Addr newpc = xc->regs.intRegFile[ReturnAddressReg];
|
|
|
|
|
|
|
|
|
|
DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description,
|
|
|
|
|
xc->regs.pc, newpc);
|
|
|
|
|
|
|
|
|
|
xc->regs.pc = newpc;
|
|
|
|
|
xc->regs.npc = xc->regs.pc + sizeof(MachInst);
|
|
|
|
|
|
|
|
|
|
BranchPred *bp = xc->cpu->getBranchPred();
|
|
|
|
|
if (bp != NULL) {
|
|
|
|
|
bp->popRAS(xc->thread_num);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
FnEvent::FnEvent(PCEventQueue *q, const std::string &desc, Stats::MainBin *bin)
|
|
|
|
|
: PCEvent(q, desc), _name(desc), mybin(bin)
|
2004-05-17 19:22:19 +02:00
|
|
|
{
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
FnEvent::process(ExecContext *xc)
|
|
|
|
|
{
|
|
|
|
|
if (xc->misspeculating())
|
|
|
|
|
return;
|
|
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
xc->system->kernelBinning->call(xc, mybin);
|
|
|
|
|
}
|
2004-05-17 19:22:19 +02:00
|
|
|
|
2004-08-20 17:35:31 +02:00
|
|
|
void
|
|
|
|
|
IdleStartEvent::process(ExecContext *xc)
|
|
|
|
|
{
|
|
|
|
|
xc->kernelStats->setIdleProcess(xc->regs.ipr[AlphaISA::IPR_PALtemp23]);
|
2004-10-02 18:34:54 +02:00
|
|
|
remove();
|
2004-05-17 19:22:19 +02:00
|
|
|
}
|
2004-09-03 20:12:59 +02:00
|
|
|
|
|
|
|
|
void
|
|
|
|
|
InterruptStartEvent::process(ExecContext *xc)
|
|
|
|
|
{
|
|
|
|
|
xc->kernelStats->mode(Kernel::interrupt);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
InterruptEndEvent::process(ExecContext *xc)
|
|
|
|
|
{
|
|
|
|
|
// We go back to kernel, if we are user, inside the rti
|
|
|
|
|
// pal code we will get switched to user because of the ICM write
|
|
|
|
|
xc->kernelStats->mode(Kernel::kernel);
|
|
|
|
|
}
|
