[root]
type=Root
children=system
eventq_index=0
full_system=false
sim_quantum=0
time_sync_enable=false
time_sync_period=100000000000
time_sync_spin_threshold=100000000

[system]
type=System
children=clk_domain cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 cpu_clk_domain funcbus funcmem l2c membus physmem toL2Bus voltage_domain
boot_osflags=a
cache_line_size=64
clk_domain=system.clk_domain
eventq_index=0
init_param=0
kernel=
load_addr_mask=1099511627775
mem_mode=timing
mem_ranges=
memories=system.funcmem system.physmem
num_work_ids=16
readfile=
symbolfile=
work_begin_ckpt_count=0
work_begin_cpu_id_exit=-1
work_begin_exit_count=0
work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
system_port=system.membus.slave[1]

[system.clk_domain]
type=SrcClockDomain
clock=1000
eventq_index=0
voltage_domain=system.voltage_domain

[system.cpu0]
type=MemTest
children=l1c
atomic=false
clk_domain=system.cpu_clk_domain
eventq_index=0
issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=10
progress_interval=10000
suppress_func_warnings=false
sys=system
trace_addr=0
functional=system.funcbus.slave[0]
test=system.cpu0.l1c.cpu_side

[system.cpu0.l1c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu0.l1c.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu0.test
mem_side=system.toL2Bus.slave[0]

[system.cpu0.l1c.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768

[system.cpu1]
type=MemTest
children=l1c
atomic=false
clk_domain=system.cpu_clk_domain
eventq_index=0
issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=10
progress_interval=10000
suppress_func_warnings=false
sys=system
trace_addr=0
functional=system.funcbus.slave[1]
test=system.cpu1.l1c.cpu_side

[system.cpu1.l1c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu1.l1c.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu1.test
mem_side=system.toL2Bus.slave[1]

[system.cpu1.l1c.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768

[system.cpu2]
type=MemTest
children=l1c
atomic=false
clk_domain=system.cpu_clk_domain
eventq_index=0
issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=10
progress_interval=10000
suppress_func_warnings=false
sys=system
trace_addr=0
functional=system.funcbus.slave[2]
test=system.cpu2.l1c.cpu_side

[system.cpu2.l1c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu2.l1c.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu2.test
mem_side=system.toL2Bus.slave[2]

[system.cpu2.l1c.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768

[system.cpu3]
type=MemTest
children=l1c
atomic=false
clk_domain=system.cpu_clk_domain
eventq_index=0
issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=10
progress_interval=10000
suppress_func_warnings=false
sys=system
trace_addr=0
functional=system.funcbus.slave[3]
test=system.cpu3.l1c.cpu_side

[system.cpu3.l1c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu3.l1c.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu3.test
mem_side=system.toL2Bus.slave[3]

[system.cpu3.l1c.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768

[system.cpu4]
type=MemTest
children=l1c
atomic=false
clk_domain=system.cpu_clk_domain
eventq_index=0
issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=10
progress_interval=10000
suppress_func_warnings=false
sys=system
trace_addr=0
functional=system.funcbus.slave[4]
test=system.cpu4.l1c.cpu_side

[system.cpu4.l1c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu4.l1c.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu4.test
mem_side=system.toL2Bus.slave[4]

[system.cpu4.l1c.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768

[system.cpu5]
type=MemTest
children=l1c
atomic=false
clk_domain=system.cpu_clk_domain
eventq_index=0
issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=10
progress_interval=10000
suppress_func_warnings=false
sys=system
trace_addr=0
functional=system.funcbus.slave[5]
test=system.cpu5.l1c.cpu_side

[system.cpu5.l1c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu5.l1c.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu5.test
mem_side=system.toL2Bus.slave[5]

[system.cpu5.l1c.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768

[system.cpu6]
type=MemTest
children=l1c
atomic=false
clk_domain=system.cpu_clk_domain
eventq_index=0
issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=10
progress_interval=10000
suppress_func_warnings=false
sys=system
trace_addr=0
functional=system.funcbus.slave[6]
test=system.cpu6.l1c.cpu_side

[system.cpu6.l1c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu6.l1c.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu6.test
mem_side=system.toL2Bus.slave[6]

[system.cpu6.l1c.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768

[system.cpu7]
type=MemTest
children=l1c
atomic=false
clk_domain=system.cpu_clk_domain
eventq_index=0
issue_dmas=false
max_loads=100000
memory_size=65536
percent_dest_unaligned=50
percent_functional=50
percent_reads=65
percent_source_unaligned=50
percent_uncacheable=10
progress_interval=10000
suppress_func_warnings=false
sys=system
trace_addr=0
functional=system.funcbus.slave[7]
test=system.cpu7.l1c.cpu_side

[system.cpu7.l1c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=4
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=2
is_top_level=true
max_miss_count=0
mshrs=4
prefetch_on_access=false
prefetcher=Null
response_latency=2
sequential_access=false
size=32768
system=system
tags=system.cpu7.l1c.tags
tgts_per_mshr=20
two_queue=false
write_buffers=8
cpu_side=system.cpu7.test
mem_side=system.toL2Bus.slave[7]

[system.cpu7.l1c.tags]
type=LRU
assoc=4
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=2
sequential_access=false
size=32768

[system.cpu_clk_domain]
type=SrcClockDomain
clock=500
eventq_index=0
voltage_domain=system.voltage_domain

[system.funcbus]
type=NoncoherentBus
clk_domain=system.clk_domain
eventq_index=0
header_cycles=1
use_default_range=false
width=8
master=system.funcmem.port
slave=system.cpu0.functional system.cpu1.functional system.cpu2.functional system.cpu3.functional system.cpu4.functional system.cpu5.functional system.cpu6.functional system.cpu7.functional

[system.funcmem]
type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=true
eventq_index=0
in_addr_map=false
latency=30000
latency_var=0
null=false
range=0:134217727
port=system.funcbus.master[0]

[system.l2c]
type=BaseCache
children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_snoops=true
hit_latency=20
is_top_level=false
max_miss_count=0
mshrs=20
prefetch_on_access=false
prefetcher=Null
response_latency=20
sequential_access=false
size=65536
system=system
tags=system.l2c.tags
tgts_per_mshr=12
two_queue=false
write_buffers=8
cpu_side=system.toL2Bus.master[0]
mem_side=system.membus.slave[0]

[system.l2c.tags]
type=LRU
assoc=8
block_size=64
clk_domain=system.cpu_clk_domain
eventq_index=0
hit_latency=20
sequential_access=false
size=65536

[system.membus]
type=CoherentBus
clk_domain=system.clk_domain
eventq_index=0
header_cycles=1
system=system
use_default_range=false
width=16
master=system.physmem.port
slave=system.l2c.mem_side system.system_port

[system.physmem]
type=SimpleMemory
bandwidth=73.000000
clk_domain=system.clk_domain
conf_table_reported=true
eventq_index=0
in_addr_map=true
latency=30000
latency_var=0
null=false
range=0:134217727
port=system.membus.master[0]

[system.toL2Bus]
type=CoherentBus
clk_domain=system.cpu_clk_domain
eventq_index=0
header_cycles=1
system=system
use_default_range=false
width=16
master=system.l2c.cpu_side
slave=system.cpu0.l1c.mem_side system.cpu1.l1c.mem_side system.cpu2.l1c.mem_side system.cpu3.l1c.mem_side system.cpu4.l1c.mem_side system.cpu5.l1c.mem_side system.cpu6.l1c.mem_side system.cpu7.l1c.mem_side

[system.voltage_domain]
type=VoltageDomain
eventq_index=0
voltage=1.000000

